Wu G., Huang J., Zang Y. et al. · Journal of the American Chemical Society · 2017 · 1360-1363
Open a family to keep every result attached to its sample, method and conditions.
Paraphrased for this database from the authors’ stated interpretations — never quoted verbatim — and kept separate from reported measurements.
The work demonstrates microporous FETs with a MOF active channel and suggests porous channels may extend FET use in sensors, voltage-gated ion channels and microfluidic chips.
Caveat: The paper fabricates FETs but does not demonstrate sensing, ion-channel or microfluidic operation.
main p.3-p.4 / article p.1362-p.1363 · Conclusion · Linked to 4 structured results
The FETs did not show transistor characteristic saturation, and transfer-curve on/off ratios decreased with increasing Vds, probably because the Ni3(HITP)2 membrane is highly conductive.
Caveat: Attribution to high conductivity is proposed by the authors by analogy to graphene and Cu-BHT FETs.
main p.3 / article p.1362 · Results and discussion · Figure S13 · Linked to 1 structured result
The electrically relevant top layer of the membrane is Ni3(HITP)2 rather than Ni, NiO or Ni(OH)2 impurity.
Caveat: XRD/XPS rule out common Ni species at the probed top surface; bulk trace impurities below detection are not discussed.
main p.2 / article p.1361 · Results and discussion · Figures S3,S6,S7 · Linked to 3 structured results
The ultrasmooth top surface of the free-standing Ni3(HITP)2 membrane forms a high-quality semiconductor-dielectric interface with SiO2, enabling porous FET fabrication and low interface defect density.
Caveat: Causal link is inferred by the authors from surface roughness, transfer geometry and FET metrics.
main p.2-p.3 / article p.1361-p.1362 · Results and discussion · Figures 1,2,3 · Linked to 4 structured results
Hydrophobic Ni3(HITP)2 nanoparticles float at the water surface and closely pack into a nanometre-thick uniform layer, after which continuous assembly at the MOF-solution interface grows the membrane.
Caveat: Mechanism is an author interpretation based on observed interface formation, hydrophobicity and membrane growth.
main p.2 / article p.1361 · Results and discussion · Figure S1 · Linked to 2 structured results
High hole mobility is attributed to an extended charge-delocalised ab-plane layer plus short 3.5 A interlayer spacing that supports both through-bond and through-space transport.
Caveat: Mechanistic explanation is interpretive and not backed by direct orbital-overlap measurement in this paper.
main p.3 / article p.1362 · Results and discussion · Figure 3 · Linked to 2 structured results
Ni3(HITP)2 behaves as a p-type semiconductor in the FET, with holes as majority carriers.
Caveat: Carrier type is determined from FET transfer/output behaviour rather than Hall measurement.
main p.3 / article p.1362 · Results and discussion · Figure 3 · Linked to 3 structured results
Names and aliases are kept exactly within the paper’s own identity model.
| Material | Composition | Structure context | Source |
|---|---|---|---|
| Ni3(HITP)2Browse family: Ni₃(HITP)₂ / Ni–HITP | Ni3(HITP)2Square-planar Ni2+ centres · HITP, 2,3,6,7,10,11-hexaiminotriphenylenesemiquinonate, generated from HATP | 2D · PristineLayered graphene-like honeycomb porous framework with sixfold symmetry, AB stacking, 1D channels and ca. 1.4 nm open windows. | main p.2 / article p.1361 · Results and discussion · Figure 1a |
Sample form, processing state and composition status define the context for measurements.
| Sample | Form and role | Processing and geometry | Source |
|---|---|---|---|
| Ni3(HITP)2-based porous FET device 1research_0015__mat__ni3_hitp2 | Electrode · Target Sample · Pristine Framework | Membrane stamped onto SiO2/Si in top-surface/SiO2 mode, rinsed, vacuum dried and contacted with thermally evaporated Au electrodes.SiO2/Si wafer; heavily doped p-type Si gate; 300 nm SiO2 dielectric; 50 nm Au source/drain electrodes · 105 nm active Ni3(HITP)2 membrane; 50 nm Au electrodes; channel length 100 um and width 1000 um | main p.2 / article p.1361 · Results and discussion · Figures 2, 3; Figure S8 |
| Five additional Ni3(HITP)2-based porous FETs on the same SiO2/Si substrateresearch_0015__mat__ni3_hitp2 | Electrode · Target Sample · Pristine Framework | Additional devices fabricated on the same substrate and characterised at Vds = -1 V.SiO2/Si wafer with Au source/drain electrodes · Same nominal geometry as device 1; channel length 100 um and width 1000 um | main p.3 / article p.1362 · Results and discussion · Figures S10-S12 |
| Free-standing Ni3(HITP)2 membraneresearch_0015__mat__ni3_hitp2 | Thin Film · Target Sample · Pristine Framework | Air-liquid interfacial self-assembled membrane, dark blue-violet when grown thicker.Free-standing at air-liquid interface; transferred to silicon wafer for characterisation · ca. 100 nm after reaction for 3 min | main p.2 / article p.1361 · Results and discussion · Figure 1b-d; Scheme S1 |
| Ni3(HITP)2 powder acquired from membraneresearch_0015__mat__ni3_hitp2 | Powder · Target Sample · Pristine Framework | Dried membrane gently ground into powder, reflux-washed in DI water and ethanol, then dried at 100 deg C in vacuum for surface-area measurements. | SI p.S3 · Methods · Figure S2 |