Electrical Transport — MOF-enabled high-density 2D molecular crystal optoelectronic memory transistor with floating gate architecture

Measurement evidence

Electrical Transport

MOF-enabled high-density 2D molecular crystal optoelectronic memory transistor with floating gate architecture · Gao S., Ren Y., Zhang D. et al. · Journal of Materials Chemistry C · 2024 · 6943-6951

3 measurement groups · 15 results

Reported values remain attached to the sample, method, conditions, extraction quality and source location that produced them.

OFET transfer and output curves using semiconductor parameter analyser

DTT-8 2DMC OFET control · Electrode

Charge-transport properties of OFET based on DTT-8 2DMC.

Temperature
room temperature
Atmosphere
air
Geometry
Bottom-gate/top-contact OFET; detailed channel dimensions not specified for this control.
Context
DTT-8 OFET control without MOF floating gate.
Measurement source
SI p.5 · Figure S11 · Fig. S11
PropertyReported valueNormalised valueUncertaintyOrigin and qualitySource
DTT-8 OFET output current at high negative biasapproximately 20 uA at VDS = -60 V and VGS = -60 V0.00002 AVisual Estimate
Approximate
SI p.5 · Figure S11 · Fig. S11b
DTT-8 2DMC OFET transport typesignificant p-type transport characteristicsText
Qualitative
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S11

Optoelectronic transistor transfer curves under 365 nm laser irradiation

Cu3(HHTP)2/PMMA/DTT-8 floating-gate optical memory transistor · Electrode

Floating-gate memory response under varied 365 nm illumination intensities.

Temperature
room temperature
Atmosphere
air
Geometry
Bottom-gate/top-contact OFET with Cu3(HHTP)2 floating gate, PMMA blocking layer and DTT-8 channel.
Context
Composite device containing pristine Cu3(HHTP)2 MOF film.
Measurement source
main p.4-5, article pp.6946-6947 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3b-c and Fig. S12
PropertyReported valueNormalised valueUncertaintyOrigin and qualitySource
IDS increase after laser irradiationup to 3 orders of magnitude1000 foldText
Rounded Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3d
Maximum specific detectivity D*Marked as a best value within this paper7 x 10^15 Jones7000000000000000 JonesText
Rounded Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S12
Optical memory transistor memory windowMarked as a best value within this paper36 V36 VText
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3c
Number of current states obtained by changing light doseMarked as a best value within this paperten different current states10 statesText
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3d-f
No-MOF control memory behaviouroptical switching only, without memory behaviorText
Qualitative
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S13-S14
Maximum photosensitivity PMarked as a best value within this paper1 x 10^710000000 dimensionlessText
Rounded Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S12
Maximum photoresponsivityMarked as a best value within this paper450 A W-1450 A W-1Text
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S12

Optical programming/electrical erasing cycling and current retention

Cu3(HHTP)2/PMMA/DTT-8 floating-gate optical memory transistor · Electrode

365 nm laser programming for 10 s; electrical erasure with VGS = -60 V for 2 s; repeated cycling and retention tests.

Temperature
room temperature
Atmosphere
air
Geometry
Floating-gate optical memory transistor.
Context
Composite device containing Cu3(HHTP)2 MOF floating gate.
Measurement source
main p.4-5, article pp.6946-6947 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3g-i and Fig. S15-S16
PropertyReported valueNormalised valueUncertaintyOrigin and qualitySource
Programming/erasing cycle durabilityMarked as a best value within this paper100 cycles with no performance degradation / almost no attenuation in programming state100 cyclesText
Exact Reported
main p.1 and p.5, article pp.6943 and 6947 · Abstract and 2.3 · Fig. 3h
Electrical erasing duration2 seconds2 sText
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3g
Electrical erasing gate voltageVGS = -60 V-60 VText
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3g
Light-intensity-dependent on/off ratioMarked as a best value within this paper2 x 10^62000000 dimensionlessText
Rounded Reported
main p.5, article p.6947 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S16
Optical programming pulse duration365 nm laser for 10 seconds10 sText
Exact Reported
main p.4, article p.6946 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. 3g
Optical memory current retention time reported in main textup to approximately 10 000 seconds10000 sText
Approximate
main p.5, article p.6947 · 2.3 2DMC optical memory transistors based on MOF floating gate · Fig. S15